3927 search results - page 710 / 786 » Dynamic Dependencies and Performance Improvement |
142
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ISCA
1999
IEEE
15 years 10 months ago
1999
IEEE
The trace cache is a recently proposed solution to achieving high instruction fetch bandwidth by buffering and reusing dynamic instruction traces. This work presents a new block-b...
148
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CASCON
2003
15 years 7 months ago
2003
Electronic commerce servers have a significant presence in today’s Internet. Corporations require good performance for their business processes. To date, little empirical evide...
150
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WSC
2000
15 years 7 months ago
2000
Discrete event simulations often require a future event list structure to manage events according to their timestamp. The choice of an efficient data structure is vital to the per...
168
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ICCAD
2009
IEEE
15 years 3 months ago
2009
IEEE
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
182
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SIGSOFT
2003
ACM
16 years 7 months ago
2003
ACM
This paper presents a novel approach for automated test data generation of imperative programs containing integer, boolean and/or float variables. It extends our previous work to ...