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MICRO
2005
IEEE
144views Hardware» more  MICRO 2005»
15 years 12 months ago
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance
Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardw...
Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vi...
ISCA
2008
IEEE
92views Hardware» more  ISCA 2008»
16 years 23 days ago
Counting Dependence Predictors
Modern processors rely on memory dependence prediction to execute load instructions as early as possible, speculating that they are not dependent on an earlier, unissued store. To...
Franziska Roesner, Doug Burger, Stephen W. Keckler
IFL
2000
Springer
15 years 10 months ago
Improving Cache Effectiveness through Array Data Layout Manipulation in SAC
Sac is a functional array processing language particularly designed with numerical applications in mind. In this field the runtime performance of programs critically depends on the...
Clemens Grelck
GLOBECOM
2010
IEEE
15 years 3 months ago
On Comparing the Performance of Dynamic Multi-Network Optimizations
With a large variety of wireless access technologies available, multi-homed devices may strongly improve the performance and reliability of communication when using multiple networ...
Geert Jan Hoekstra, Robert D. van der Mei, J. W. B...
TVLSI
2008
164views more  TVLSI 2008»
15 years 6 months ago
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...