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MICRO
1995
IEEE
97views Hardware» more  MICRO 1995»
15 years 9 months ago
Improving CISC instruction decoding performance using a fill unit
Current superscalar processors, both RISC and CISC, require substantial instruction fetch and decode bandwidth to keep multiple functional units utilized. While CISC instructions ...
Mark Smotherman, Manoj Franklin
CCR
2006
81views more  CCR 2006»
15 years 6 months ago
LTCP: improving the performance of TCP in highspeed networks
In this paper, we propose Layered TCP (LTCP for short), a set of simple modifications to the congestion window response of TCP to make it more scalable in highspeed networks. LTCP...
Sumitha Bhandarkar, Saurabh Jain, A. L. Narasimha ...
PAMI
2010
168views more  PAMI 2010»
15 years 4 months ago
Dynamic Hybrid Algorithms for MAP Inference in Discrete MRFs
—In this paper, we present novel techniques that improve the computational and memory efficiency of algorithms for solving multi-label energy functions arising from discrete MRF...
Karteek Alahari, Pushmeet Kohli, Philip H. S. Torr
ICCD
1997
IEEE
78views Hardware» more  ICCD 1997»
15 years 10 months ago
Speeding up Variable Reordering of OBDDs
In this paper, we suggest a block-restricted sifting strategy which is based on the restriction of Rudell's sifting to certain blocks of variables. The application of this st...
Christoph Meinel, Anna Slobodová
GECCO
2007
Springer
195views Optimization» more  GECCO 2007»
15 years 10 months ago
Diverse committees vote for dependable profits
Stock selection for hedge fund portfolios is a challenging problem for Genetic Programming (GP) because the markets (the environment in which the GP solution must survive) are dyn...
Wei Yan, Christopher D. Clack