3927 search results - page 276 / 786 » Dynamic Dependencies and Performance Improvement |
221
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ISCA
2012
IEEE
13 years 9 months ago
2012
IEEE
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
178
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WECWIS
2002
IEEE
15 years 11 months ago
2002
IEEE
Various dynamic content caching approaches have been proposed to address the performance and scalability problems faced by many Web sites that utilize dynamic content generation a...
180
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MICRO
2010
IEEE
15 years 4 months ago
2010
IEEE
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...
204
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ASPLOS
2012
ACM
14 years 2 months ago
2012
ACM
The rise of multi-core processors has shifted performance efforts towards parallel programs. However, single-threaded code, whether from legacy programs or ones difficult to para...
197
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
Substantial increase in leakage current and threshold voltage fluctuations are making design of robust wide fan-in dynamic gates a challenging task. Traditionally, a PMOS keeper t...