4725 search results - page 856 / 945 » Dynamic Architecture Extraction |
156
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ICS
2009
Tsinghua U.
16 years 1 months ago
2009
Tsinghua U.
With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), ...
198
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ICAC
2009
IEEE
16 years 1 months ago
2009
IEEE
In data centers hosting scaling Internet applications, operators face the tradeoff dilemma between resource efficiency and Quality of Service (QoS), and the root cause lies in wo...
184
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RTAS
2009
IEEE
16 years 1 months ago
2009
IEEE
Supporting uninterrupted services for distributed soft real-time applications is hard in resource-constrained and dynamic environments, where processor or process failures and sys...
176
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CF
2009
ACM
16 years 24 days ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
179
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ICDCS
2008
IEEE
16 years 21 days ago
2008
IEEE
The multi-level storage architecture has been widely adopted in servers and data centers. However, while prefetching has been shown as a crucial technique to exploit the sequentia...