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CODES
2007
IEEE
16 years 21 days ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
16 years 21 days ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
ICCCN
2007
IEEE
16 years 21 days ago
Infrastructure for Cross-Layer Designs Interaction
Abstract—The current system design of mobile ad hoc networks (MANET), derived from their traditional fixed counterparts, cannot fully meet the requirements inherent to the dynam...
Zhijiang Chang, Georgi Gaydadjiev, Stamatis Vassil...
IPPS
2007
IEEE
16 years 20 days ago
Load Miss Prediction - Exploiting Power Performance Trade-offs
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
Konrad Malkowski, Greg M. Link, Padma Raghavan, Ma...
ATAL
2007
Springer
16 years 17 days ago
Aborting tasks in BDI agents
Intelligent agents that are intended to work in dynamic environments must be able to gracefully handle unsuccessful tasks and plans. In addition, such agents should be able to mak...
John Thangarajah, James Harland, David N. Morley, ...