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TPHOL
2009
IEEE
16 years 1 months ago
A Better x86 Memory Model: x86-TSO
Abstract. Real multiprocessors do not provide the sequentially consistent memory that is assumed by most work on semantics and verification. Instead, they have relaxed memory mode...
Scott Owens, Susmit Sarkar, Peter Sewell
ISPASS
2008
IEEE
16 years 29 days ago
Configurational Workload Characterization
Although the best processor design for executing a specific workload does depend on the characteristics of the workload, it can not be determined without factoring-in the effect o...
Hashem Hashemi Najaf-abadi, Eric Rotenberg
SASP
2008
IEEE
183views Hardware» more  SASP 2008»
16 years 29 days ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...
WPES
2006
ACM
16 years 16 days ago
Nonesuch: a mix network with sender unobservability
Oblivious submission to anonymity systems is a process by which a message may be submitted in such a way that neither the anonymity network nor a global passive adversary may dete...
Thomas S. Heydt-Benjamin, Andrei Serjantov, Beness...
IPPS
2003
IEEE
15 years 12 months ago
Exploiting Java-ILP on a Simultaneous Multi-Trace Instruction Issue (SMTI) Processor
The available Instruction Level Parallelism in Java bytecode (Java-ILP) is not readily exploitable using traditional in-order or out-of-order issue mechanisms due to dependencies ...
R. Achutharaman, R. Govindarajan, G. Hariprakash, ...