This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
This paper presents a method to reduce the complexity of a linear or linearized (small-signal) analog circuit. The reduction technique, based on quality-error ranking, can be used...
Walter Daems, Georges G. E. Gielen, Willy M. C. Sa...
Recently, functional decomposition has been adopted for LUT based FPGA technology mapping with good results. In this paper, we propose a novel method for functional multipleoutput...
Jie-Hong Roland Jiang, Jing-Yang Jou, Juinn-Dar Hu...
A novel methodology for circuit design and automatic layout generation is proposed for a class of mixed-signal circuits in presence of layout parasitics and substrate induced nois...
Paolo Miliozzi, Iasson Vassiliou, Edoardo Charbon,...
This work casts the traffic analysis of anonymity systems, and in particular mix networks, in the context of Bayesian inference. A generative probabilistic model of mix network ar...