4725 search results - page 348 / 945 » Dynamic Architecture Extraction |
174
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
It has been widely recognized that the dynamic range information of an application can be exploited to reduce the datapath bitwidth of either processors or ASICs, and therefore th...
187
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...
169
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HPCA
2006
IEEE
16 years 7 months ago
2006
IEEE
Previous proposals for power-aware thread-level parallelism on chip multiprocessors (CMPs) mostly focus on multiprogrammed workloads. Nonetheless, parallel computation of a single...
170
Voted
IROS
2009
IEEE
16 years 1 months ago
2009
IEEE
— In this paper the compliant low level control of a biologically inspired control architecture suited for bipedal dynamic walking robots is presented. It consists of elastic mec...
149
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ICC
2007
IEEE
16 years 1 months ago
2007
IEEE
— As for today, radio spectrum resource is rigidly partitioned for dedicated purposes. The exclusive license of fixed size spectrum blocks separated by guard bands easily solves...