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ISCA
2009
IEEE
152views Hardware» more  ISCA 2009»
16 years 25 days ago
Scaling the bandwidth wall: challenges in and avenues for CMP scaling
As transistor density continues to grow at an exponential rate in accordance to Moore’s law, the goal for many Chip Multi-Processor (CMP) systems is to scale the number of on-ch...
Brian M. Rogers, Anil Krishna, Gordon B. Bell, Ken...
ISCA
2009
IEEE
159views Hardware» more  ISCA 2009»
16 years 25 days ago
End-to-end register data-flow continuous self-test
While Moore’s Law predicts the ability of semi-conductor industry to engineer smaller and more efficient transistors and circuits, there are serious issues not contemplated in t...
Javier Carretero, Pedro Chaparro, Xavier Vera, Jau...
ISORC
2009
IEEE
16 years 25 days ago
Adding Timing-Awareness to AUTOSAR Basic-Software -- A Component Based Approach
AUTOSAR as specified in its current version fosters timing-constraints at application level to support the development of real-time automotive applications. However, the standard...
Dietmar Schreiner, Markus Schordan, Jens Knoop
MICRO
2009
IEEE
160views Hardware» more  MICRO 2009»
16 years 25 days ago
Variation-tolerant non-uniform 3D cache management in die stacked multicore processor
Process variations in integrated circuits have significant impact on their performance, leakage and stability. This is particularly evident in large, regular and dense structures...
Bo Zhao, Yu Du, Youtao Zhang, Jun Yang 0002
MICRO
2009
IEEE
148views Hardware» more  MICRO 2009»
16 years 25 days ago
Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance
The phase-change random access memory (PRAM) technology is fast maturing to production levels. Main advantages of PRAM are non-volatility, byte addressability, in-place programmab...
Sangyeun Cho, Hyunjin Lee