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HPCC
2005
Springer
16 years 9 days ago
Memory Subsystem Characterization in a 16-Core Snoop-Based Chip-Multiprocessor Architecture
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
Francisco J. Villa, Manuel E. Acacio, José ...
166
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NPC
2005
Springer
16 years 8 days ago
Performance Modelling and Optimization of Memory Access on Cellular Computer Architecture Cyclops64
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
Yanwei Niu, Ziang Hu, Kenneth E. Barner, Guang R. ...
AIS
2004
Springer
16 years 6 days ago
Proposal of High Level Architecture Extension
The paper proposes three dimensional extension to High Level ARchitecture (HLA) and Runtime Infrastructure (RTI) to solve several issues such as security, information hiding proble...
Jae-Hyun Kim, Tag Gon Kim
187
Voted
ISADS
2003
IEEE
16 years 2 days ago
The Central Guardian Approach to Enforce Fault Isolation in the Time-Triggered Architecture
This paper discusses measures to make a distributed system based on the Time-Triggered Architecture resistant to arbitrary node failures. To achieve this, the presented approach i...
Günther Bauer, Hermann Kopetz, Wilfried Stein...
MSS
2003
IEEE
76views Hardware» more  MSS 2003»
16 years 2 days ago
A Scalable Architecture for Clustered Network Attached Storage
Network attached storage systems must provide highly available access to data while maintaining high performance, easy management, and maximum scalability. In this paper, we descr...
Jonathan D. Bright, John A. Chandy