In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
Yanwei Niu, Ziang Hu, Kenneth E. Barner, Guang R. ...
The paper proposes three dimensional extension to High Level ARchitecture (HLA) and Runtime Infrastructure (RTI) to solve several issues such as security, information hiding proble...
This paper discusses measures to make a distributed system based on the Time-Triggered Architecture resistant to arbitrary node failures. To achieve this, the presented approach i...
Network attached storage systems must provide highly available access to data while maintaining high performance, easy management, and maximum scalability. In this paper, we descr...