7379 search results - page 402 / 1476 » Distributed vector architectures |
186
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CDC
2010
IEEE
15 years 1 months ago
2010
IEEE
Abstract-- It is desirable to limit the amount of communication and computation generated by each agent in a large multi-agent system. Event- and self-triggered control strategies ...
156
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VLSID
2006
IEEE
16 years 7 months ago
2006
IEEE
We present a new style of long-distance, on-chip interconnect, based loosely on the asynchronous GasP architecture. It has a number of advantages over conventional designs, the mo...
183
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HPCA
2001
IEEE
16 years 7 months ago
2001
IEEE
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
169
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ICCD
2004
IEEE
16 years 3 months ago
2004
IEEE
A cache access time model, PRACTICS (PRedictor of Access and Cycle TIme for Cache Stack), has been developed to optimize the memory array architecture for the minimum access and c...
186
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ISW
2009
Springer
16 years 1 months ago
2009
Springer
Abstract. The complexity of modern network architectures and the epidemic diffusion of malware require collaborative approaches for defense. We present a novel distributed system ...