Mandated requirements to share information across different sensitivity domains necessitate the design of distributed architectures to enforce information flow policies while pr...
Cynthia E. Irvine, Thuy D. Nguyen, David J. Shiffl...
We consider two flow control schemes for Best Effort traffic in on-chip architectures, which can be deemed as the solutions to the boundary extremes of a class of utility maximi...
Fahimeh Jafari, Mohammad Sadegh Talebi, Mohammad H...
Hybrid architectures combining the strengths of generalpurpose processors with application-specific hardware accelerators can lead to a significant performance improvement. Our ...
The real-time image forming in future, high-end synthetic aperture radar systems is an example of an application that puts new demands on computer architectures. The initial quest...
Anders Ahlander, H. Hellsten, K. Lind, J. Lindgren...
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...