7379 search results - page 224 / 1476 » Distributed vector architectures |
187
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PLDI
2005
ACM
16 years 1 days ago
2005
ACM
Software pipelining of a multi-dimensional loop is an important optimization that overlaps the execution of successive outermost loop iterations to explore instruction-level paral...
168
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SIGCOMM
2004
ACM
15 years 12 months ago
2004
ACM
Currently the Internet has only one level of name resolution, DNS, which converts user-level domain names into IP addresses. In this paper we borrow liberally from the literature ...
165
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VTS
1995
IEEE
15 years 10 months ago
1995
IEEE
In this paper, we propose an entirely new Built-In Self Test scheme for high-level synthesis of data path architectures that makes use of the arithmetic blocks in the data path to...
176
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IPPS
2006
IEEE
16 years 15 days ago
2006
IEEE
The increasing demand for FPGAs and reconfigurable hardware targeting high performance low power applications has lead to an increasing requirement for new high performance reconf...
144
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ICLP
2001
Springer
15 years 11 months ago
2001
Springer
This paper describes the development of the PALS system, an implementation of Prolog that efficiently exploits or-parallelism on share-nothing platforms. PALS makes use of a novel ...