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IPPS
2000
IEEE
15 years 10 months ago
A Novel Superscalar Architecture for Fast DCT Implementation
This paper presents a new superscalar architecture for fast discrete cosine transform (DCT). Comparing with the general SIMD architecture, it speeds up the DCT computation by a fac...
Zhang Yong, Min Zhang
PPOPP
2009
ACM
16 years 7 months ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle
IEEEPACT
2007
IEEE
16 years 22 days ago
CacheScouts: Fine-Grain Monitoring of Shared Caches in CMP Platforms
As multi-core architectures flourish in the marketplace, multi-application workload scenarios (such as server consolidation) are growing rapidly. When running multiple application...
Li Zhao, Ravi R. Iyer, Ramesh Illikkal, Jaideep Mo...
DAC
2005
ACM
15 years 8 months ago
A combined feasibility and performance macromodel for analog circuits
The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a num...
Mengmeng Ding, Ranga Vemuri
ICWS
2003
IEEE
15 years 7 months ago
A Web Service Approach to Universal Accessibility in Collaboration Services
The enormous growth in wireless communications and miniaturized handheld devices in the last few years, have given rise to a vast range of new services, for heterogeneous user env...
Sangmi Lee, Sung Hoon Ko, Geoffrey Fox, Kang-Seok ...