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IPPS
2003
IEEE
16 years 22 hour ago
Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
Ying Chen, Resit Sendag, David J. Lilja
IPPS
2003
IEEE
16 years 22 hour ago
Expresso and Chips: Creating a Next Generation Microarray Experiment Management System
Expresso is an experiment management system that is designed to assist biologists in planning, executing, and interpreting microarray experiments. It serves as a unifying framewor...
Allan A. Sioson, Jonathan I. Watkinson, Cecilia Va...
APPT
2003
Springer
15 years 12 months ago
A Highly Efficient FC-SAN Based on Load Stream
The speed of storing and fetching data on SCSI disks has a great restriction on the efficiency of SAN based on Fiber Channel Network. In this paper, a high-efficient FC-SAN storage...
Jiwu Shu, Jun Yao, Changdong Fu, Weimin Zheng
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ISHPC
2003
Springer
15 years 12 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
EDOC
2002
IEEE
15 years 11 months ago
Anti-Yacc: MOF-to-Text
The Object Management Group (OMG) is pursuing its new Model-Driven Architecture (MDA) strategy. The Meta-Object Facility (MOF) is an important technology to support the MDA, both ...
David Hearnden, Kerry Raymond, Jim Steel