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ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
16 years 3 months ago
Statistical based link insertion for robust clock network design
We present a statistical based non-tree clock distribution construction algorithm that starts with a tree and incrementally insert cross links, such that the skew variation of the...
Wai-Ching Douglas Lam, J. Jam, Cheng-Kok Koh, Venk...
IPPS
2007
IEEE
16 years 20 days ago
QUKU: A FPGA Based Flexible Coarse Grain Architecture Design Paradigm using Process Networks
DSP applications can be suitably represented using Process Network Models. This paper uses a modification of Kahn Process Network to solve the problem of finding an optimum arch...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
IPPS
2006
IEEE
16 years 12 days ago
A stochastic multi-objective algorithm for the design of high performance reconfigurable architectures
The increasing demand for FPGAs and reconfigurable hardware targeting high performance low power applications has lead to an increasing requirement for new high performance reconf...
Wing On Fung, Tughrul Arslan
RTSS
2003
IEEE
15 years 11 months ago
A Hybrid Control Design for QoS Management
In this paper we present an approach for QoS management that can be applied to a general class of real-time distributed computation systems. In the proposed approach a switching h...
Sherif Abdelwahed, Sandeep Neema, Joseph P. Loyall...
DICS
2006
15 years 8 months ago
Advances in the Design and Implementation of Group Communication Middleware
Abstract. Group communication is a programming abstraction that allows a distributed group of processes to provide a reliable service in spite of the possibility of failures within...
Daniel C. Bünzli, Rachele Fuzzati, Sergio Men...