1823 search results - page 209 / 365 » Distributed lossy averaging |
152
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ICPP
2003
IEEE
15 years 11 months ago
2003
IEEE
The bus that connects processors to memory is known to be a major architectural bottleneck in SMPs. However, both software and scheduling policies for these systems generally focu...
180
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ICPP
2003
IEEE
15 years 11 months ago
2003
IEEE
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
164
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INFOCOM
2003
IEEE
15 years 11 months ago
2003
IEEE
Abstract— Throughput performance of the IEEE 802.11 Distributed Coordination Function (DCF) is very sensitive to the number n of competing stations. The contribute of this paper ...
162
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IPPS
2003
IEEE
15 years 11 months ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
147
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IPPS
2003
IEEE
15 years 11 months ago
2003
IEEE
While prefetch has proven itself useful for reducing cache misses in multiprocessors, traffic is often increased due to extra unused prefetch data. Prefetching in multiprocessors...