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» Distributed linear discriminant analysis
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SLIP
2009
ACM
16 years 14 days ago
Predicting the worst-case voltage violation in a 3D power network
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...
Wanping Zhang, Wenjian Yu, Xiang Hu, Amirali Shaya...
IPPS
2009
IEEE
16 years 18 days ago
Multi-users scheduling in parallel systems
We are interested in this paper to study scheduling problems in systems where many users compete to perform their respective jobs on shared parallel resources. Each user has speci...
Erik Saule, Denis Trystram
ICPPW
2008
IEEE
16 years 12 days ago
Replay-Based Synchronization of Timestamps in Event Traces of Massively Parallel Applications
Event traces are helpful in understanding the performance behavior of message-passing applications since they allow in-depth analyses of communication and synchronization patterns...
Daniel Becker, John C. Linford, Rolf Rabenseifner,...
IPPS
2007
IEEE
16 years 7 days ago
POET: Parameterized Optimizations for Empirical Tuning
The excessive complexity of both machine architectures and applications have made it difficult for compilers to statically model and predict application behavior. This observatio...
Qing Yi, Keith Seymour, Haihang You, Richard W. Vu...
SPAA
2003
ACM
15 years 11 months ago
Throughput-centric routing algorithm design
The increasing application space of interconnection networks now encompasses several applications, such as packet routing and I/O interconnect, where the throughput of a routing a...
Brian Towles, William J. Dally, Stephen P. Boyd