This paper presents a domain-independent architecture for facilitating visual problem solving between robots or softbots and humans. The architecture denes virtual and human agen...
In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on...
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
—Recent studies show that network coding improves multicast session throughput. In this paper, we demonstrate how random linear network coding can be incorporated to provide netw...
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...