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PC
2007
161views Management» more  PC 2007»
15 years 6 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...
SIAMIS
2011
15 years 2 months ago
Large Scale Bayesian Inference and Experimental Design for Sparse Linear Models
Abstract. Many problems of low-level computer vision and image processing, such as denoising, deconvolution, tomographic reconstruction or superresolution, can be addressed by maxi...
Matthias W. Seeger, Hannes Nickisch
JSAT
2010
108views more  JSAT 2010»
15 years 2 months ago
Experiment design and administration for computer clusters for SAT-solvers (EDACC)
The design of a SAT-solver or the modification of an existing one is always followed by a phase of intensive testing of the solver on a benchmark of instances. This task can be ve...
Adrian Balint, Daniel Gall, Gregor Kapler, Robert ...
ADHOC
2011
14 years 11 months ago
RadiaLE: A framework for designing and assessing link quality estimators in wireless sensor networks
—Stringent cost and energy constraints impose the use of low-cost and low-power radio transceivers in large-scale wireless sensor networks (WSNs). This fact, together with the ha...
Nouha Baccour, Anis Koubaa, Maissa Ben Jamâa...
HPCA
2009
IEEE
16 years 8 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...