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DAC
2000
ACM
16 years 8 months ago
Multiple Si layer ICs: motivation, performance analysis, and design implications
Continuous scaling of VLSI circuits is reducing gate delays but rapidly increasing interconnect delays. Semiconductor Industry Association (SIA) roadmap predicts that, beyond the ...
Shukri J. Souri, Kaustav Banerjee, Amit Mehrotra, ...
190
Voted
HPCA
2009
IEEE
16 years 7 months ago
Design and implementation of software-managed caches for multicores with local memory
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
Sangmin Seo, Jaejin Lee, Zehra Sura
193
Voted
CHI
2007
ACM
16 years 7 months ago
Work-centered design: a case study of a mixed-initiative scheduler
We present the case study of a complex, mixed-initiative scheduling system to illustrate Work-Centered Design (WCD), a new approach for the design of information systems. WCD is b...
Keith A. Butler, Jiajie Zhang, Chris Esposito, Ali...
183
Voted
DATE
2009
IEEE
215views Hardware» more  DATE 2009»
16 years 2 months ago
EMC-aware design on a microcontroller for automotive applications
In modern digital ICs, the increasing demand for performance and throughput requires operating frequencies of hundreds of megahertz, and in several cases exceeding the gigahertz r...
Patrice Joubert Doriol, Yamarita Villavicencio, Cr...
SAS
2007
Springer
108views Formal Methods» more  SAS 2007»
16 years 1 months ago
Programming Language Design and Analysis Motivated by Hardware Evolution
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
Alan Mycroft