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IPPS
2006
IEEE
16 years 21 days ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
IPPS
2006
IEEE
16 years 21 days ago
Coordinated checkpoint from message payload in pessimistic sender-based message logging
Execution of MPI applications on Clusters and Grid deployments suffers from node and network failure that motivates the use of fault tolerant MPI implementations. Two category tec...
M. Aminian, Mohammad K. Akbari, Bahman Javadi
171
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PDP
2006
IEEE
16 years 20 days ago
A Coordination-Level Middleware for Supporting Flexible Consistency in CSCW
Highly interactive collaborative applications need to offer each user a consistent view of the interactions represented by the streams exchanged between dispersed groups of users....
Cezar Plesca, Romulus Grigoras, Philippe Qué...
NSPW
2006
ACM
16 years 18 days ago
Dark application communities
In considering new security paradigms, it is often worthwhile to anticipate the direction and nature of future attack paradigms. We identify a class of attacks based on the idea o...
Michael E. Locasto, Angelos Stavrou, Angelos D. Ke...
ICDCS
2005
IEEE
16 years 8 days ago
Supporting Live Development of SOAP and CORBA Servers
We present middleware for a Server Development Environment that facilitates live development of SOAP and CORBA servers. As the underlying implementation platform, we use JPie, a t...
Sajeeva L. Pallemulle, Kenneth J. Goldman, Brandon...