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FPL
2009
Springer
130views Hardware» more  FPL 2009»
15 years 11 months ago
Tracking elephant flows in internet backbone traffic with an FPGA-based cache
This paper presents an FPGA-friendly approach to tracking elephant flows in network traffic. Our approach, Single Step Segmented Least Recently Used (S3 -LRU) policy, is a netwo...
Martin Zádník, Marco Canini, Andrew ...
ACSC
2004
IEEE
15 years 10 months ago
Code Improvements for Model Elimination Based Reasoning Systems
We have been investigating ways in which the performance of model elimination based systems can be improved and in this paper we present some of our results. Firstly, we have inve...
Richard A. Hagen, Scott D. Goodwin, Abdul Sattar
CGO
2004
IEEE
15 years 10 months ago
Targeted Path Profiling: Lower Overhead Path Profiling for Staged Dynamic Optimization Systems
In this paper, we present a technique for reducing the overhead of collecting path profiles in the context of a dynamic optimizer. The key idea to our approach, called Targeted Pa...
Rahul Joshi, Michael D. Bond, Craig B. Zilles
FSE
2006
Springer
117views Cryptology» more  FSE 2006»
15 years 10 months ago
How Far Can We Go on the x64 Processors?
This paper studies the state-of-the-art software optimization methodology for symmetric cryptographic primitives on the new 64-bit x64 processors, AMD Athlon64 (AMD64) and Intel Pe...
Mitsuru Matsui
SIGMETRICS
1991
ACM
15 years 9 months ago
Implementing Stack Simulation for Highly-Associative Memories
Prior to this work, all implementations of stack simulation [MGS70] required more than linear time to process an address trace. In particular these implementations are often slow ...
Yul H. Kim, Mark D. Hill, David A. Wood