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DSD
2004
IEEE
136views Hardware» more  DSD 2004»
15 years 10 months ago
FPGA Based Design of the Railway's Interlocking Equipments
This paper describes the architecture of a safety system of the railway's interlocking equipment, which has been developed for Czech railways. The system will be used for the...
Radek Dobias, Hana Kubatova
DSN
2004
IEEE
15 years 10 months ago
FRTR: A Scalable Mechanism for Global Routing Table Consistency
This paper presents a scalable mechanism, Fast Routing Table Recovery (FRTR), for detecting and correcting route inconsistencies between neighboring BGP routers. The large size of...
Lan Wang, Daniel Massey, Keyur Patel, Lixia Zhang
DSN
2004
IEEE
15 years 10 months ago
Characterizing the Effects of Transient Faults on a High-Performance Processor Pipeline
The progression of implementation technologies into the sub-100 nanometer lithographies renew the importance of understanding and protecting against single-event upsets in digital...
Nicholas J. Wang, Justin Quek, Todd M. Rafacz, San...
FCCM
2004
IEEE
87views VLSI» more  FCCM 2004»
15 years 10 months ago
A Quantitative Comparison of Reconfigurable, Tiled, and Conventional Architectures on Bit-Level Computation
General purpose computing architectures are being called on to work on a more diverse application mix every day. This has been fueled by the need for reduced time to market and ec...
David Wentzlaff, Anant Agarwal
DAGM
2006
Springer
15 years 10 months ago
Visual Hand Posture Recognition in Monocular Image Sequences
We present a model-based method for hand posture recognition in monocular image sequences that measures joint angles, viewing angle, and position in space. Visual markers in form o...
Thorsten Dick, Jörg Zieren, Karl-Friedrich Kr...