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ISCA
2009
IEEE
159views Hardware» more  ISCA 2009»
16 years 1 months ago
End-to-end register data-flow continuous self-test
While Moore’s Law predicts the ability of semi-conductor industry to engineer smaller and more efficient transistors and circuits, there are serious issues not contemplated in t...
Javier Carretero, Pedro Chaparro, Xavier Vera, Jau...
DAC
2004
ACM
16 years 7 months ago
Fast statistical timing analysis handling arbitrary delay correlations
CT An efficient statistical timing analysis algorithm that can handle arbitrary (spatial and structural) causes of delay correlation is described. The algorithm derives the entire ...
Michael Orshansky, Arnab Bandyopadhyay
CLUSTER
2006
IEEE
15 years 10 months ago
Efficient Data-Movement for Lightweight I/O
Efficient data movement is an important part of any highperformance I/O system, but it is especially critical for the current and next-generation of massively parallel processing ...
Ron Oldfield, Patrick Widener, Arthur B. Maccabe, ...
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
15 years 6 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
GECCO
2007
Springer
159views Optimization» more  GECCO 2007»
16 years 23 days ago
A systemic computation platform for the modelling and analysis of processes with natural characteristics
Computation in biology and in conventional computer architectures seem to share some features, yet many of their important characteristics are very different. To address this, [1]...
Erwan Le Martelot, Peter J. Bentley, R. Beau Lotto