Many engineers are still reluctant to adopt advanced object-oriented technologies (such as high modularity, dynamic binding, automatic garbage collection, etc.) for embedded syste...
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
This paper presents the concept of pluggable parallelisation that allows scientists to develop “sequential like” codes that can take advantage of multi-core, cluster and grid ...
Multimedia instruction set extensions have become a prominent feature in desktop microprocessor platforms, promising superior performance on a wide range of floating-point and int...
Hybrid architectures combining the strengths of generalpurpose processors with application-specific hardware accelerators can lead to a significant performance improvement. Our ...