5653 search results - page 793 / 1131 » Distributed Conceptual Structures |
199
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HCW
2000
IEEE
15 years 11 months ago
2000
IEEE
In this work we present the results of a project aimed at assembling an hybrid massively parallel machine, the PQE1 prototype, devoted to the simulation of complex physical models...
177
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HPCA
2000
IEEE
15 years 11 months ago
2000
IEEE
This paper describes a new instruction-supply mechanism, called the eXtended Block Cache (XBC). The goal of the XBC is to improve on the Trace Cache (TC) hit rate, while providing...
187
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HPCA
2000
IEEE
15 years 11 months ago
2000
IEEE
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
186
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IPPS
2000
IEEE
15 years 11 months ago
2000
IEEE
This paper presents experimental results for a parallel pipeline STAP system with I/O task implementation using the parallel file systems on the Intel Paragon and the IBM SP. In ...
163
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IPPS
2000
IEEE
15 years 11 months ago
2000
IEEE
The primary goal of the Multimedia Router (MMR) project is the design and implementation of a router optimized for multimedia applications. The router is targeted for use in clust...