Despite much research in the area of wireless sensor networks in recent years, the programming of sensor nodes is still time-consuming and tedious. A new paradigm which seems to b...
Christoph Reinke, Nils Hoeller, Jana Neumann, Sven...
Clock network power in field-programmable gate arrays (FPGAs) is considered and two complementary approaches for clock power reduction in the Xilinx R VirtexTM -5 FPGA are presen...
This paper presents a system-level design methodology for networked embedded systems that exploits existing data-redundancy to increase their reliability. The presented approach n...
Large and fast hard disks for little money have enabled the processing of huge amounts of data on a single machine. For this purpose, the well-established STXXL library provides a...
Andreas Beckmann, Roman Dementiev, Johannes Single...
We describe a methodology for evolving Java bytecode, enabling the evolution of extant, unrestricted Java programs, or programs in other languages that compile to Java bytecode. B...