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DSD
2004
IEEE
106views Hardware» more  DSD 2004»
15 years 10 months ago
Finite Precision Analysis of Support Vector Machine Classification in Logarithmic Number Systems
In this paper we present an analysis of the minimal hardware precision required to implement Support Vector Machine (SVM) classification within a Logarithmic Number System archite...
Faisal M. Khan, Mark G. Arnold, William M. Potteng...
INTEGRATION
2006
102views more  INTEGRATION 2006»
15 years 6 months ago
A parameterized graph-based framework for high-level test synthesis
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
Saeed Safari, Amir-Hossein Jahangir, Hadi Esmaeilz...
IPPS
2010
IEEE
15 years 4 months ago
An auto-tuning framework for parallel multicore stencil computations
Although stencil auto-tuning has shown tremendous potential in effectively utilizing architectural resources, it has hitherto been limited to single kernel instantiations; in addi...
Shoaib Kamil, Cy Chan, Leonid Oliker, John Shalf, ...
ICUIMC
2009
ACM
16 years 1 months ago
PicAChoo: a tool for customizable feature extraction utilizing characteristics of textual data
Although documents have hundreds of thousands of unique words, only a small number of words are significantly useful for intelligent services. For this reason, feature extraction ...
Jaeseok Myung, Jung-Yeon Yang, Sang-goo Lee
SIGGRAPH
1994
ACM
15 years 10 months ago
Rotated dispersed dither: a new technique for digital halftoning
Rotated dispersed-dot dither is proposed as a new dither technique for digital halftoning. It is based on the discrete one-to-one rotation of a Bayer dispersed-dot dither array. D...
Victor Ostromoukhov, Roger D. Hersch, Isaac Amidro...