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» Dimensionality reduction and generalization
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CODES
2008
IEEE
15 years 8 months ago
Specification-based compaction of directed tests for functional validation of pipelined processors
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...
Heon-Mo Koo, Prabhat Mishra
CP
2008
Springer
15 years 8 months ago
Exploiting Common Subexpressions in Numerical CSPs
It is acknowledged that the symbolic form of the equations is crucial for interval-based solving techniques to efficiently handle systems of equations over the reals. However, only...
Ignacio Araya, Bertrand Neveu, Gilles Trombettoni
CRYPTO
2008
Springer
132views Cryptology» more  CRYPTO 2008»
15 years 8 months ago
Public-Key Locally-Decodable Codes
In this paper we introduce the notion of a Public-Key Encryption Scheme that is also a Locally-Decodable Error-Correcting Code (PKLDC). In particular, we allow any polynomialtime ...
Brett Hemenway, Rafail Ostrovsky
EMSOFT
2008
Springer
15 years 8 months ago
Energy efficient streaming applications with guaranteed throughput on MPSoCs
In this paper we present a design space exploration flow to achieve energy efficiency for streaming applications on MPSoCs while meeting the specified throughput constraints. The ...
Jun Zhu, Ingo Sander, Axel Jantsch
FPGA
2008
ACM
163views FPGA» more  FPGA 2008»
15 years 8 months ago
TORCH: a design tool for routing channel segmentation in FPGAs
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
Mingjie Lin, Abbas El Gamal