3006 search results - page 494 / 602 » Dimensionality reduction and generalization |
163
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DAC
2005
ACM
15 years 8 months ago
2005
ACM
This paper describes a novel technique called Embedded Test-bench Control (ETC), extensively used in the verification of Tensilica’s latest configurable processor. Conventional ...
171
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DAC
2005
ACM
15 years 8 months ago
2005
ACM
Although a lot of research efforts have been made in the minimization of the total power consumption caused by the clock tree, no attention has been paid to the minimization of th...
188
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DAC
2005
ACM
15 years 8 months ago
2005
ACM
With 90nm CMOS in production and 65nm testing in progress, power has been pushed to the forefront of design metrics. This paper will outline practical techniques that are used to ...
184
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DAC
2005
ACM
15 years 8 months ago
2005
ACM
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
177
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ACSD
2007
IEEE
15 years 8 months ago
2007
IEEE
We present an improvement of the SAT-based Unbounded Model Checking (UMC) algorithm. UMC, a symbolic approach introduced in [7], uses propositional formulas in conjunctive normal ...