A PAL-based logic block is the core of great majority of contemporary CPLD devices. The purpose of the paper is to present a new approach to multi-level synthesis for PAL-based CP...
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
Felipe S. Marques, Leomar S. da Rosa Jr., Renato P...
Abstract— Although the human hand is a complex biomechanical system, only a small set of features may be necessary for observation learning of functional grasp classes. We explor...
Lillian Y. Chang, Nancy S. Pollard, Tom M. Mitchel...
We make progress in understanding the complexity of the graph reachability problem in the context of unambiguous logarithmic space computation; a restricted form of nondeterminism....
Chris Bourke, Raghunath Tewari, N. V. Vinodchandra...
Modern vehicles possess an increasing number of software and hardware components that are integrated in electronic control units (ECUs). Finding an optimal allocation for all comp...