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» Dimensionality reduction and generalization
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HPCA
2005
IEEE
16 years 7 months ago
A Performance Comparison of DRAM Memory System Optimizations for SMT Processors
Memory system optimizations have been well studied on single-threaded systems; however, the wide use of simultaneous multithreading (SMT) techniques raises questions over their ef...
Zhichun Zhu, Zhao Zhang
POPL
2005
ACM
16 years 7 months ago
Automated soundness proofs for dataflow analyses and transformations via local rules
We present Rhodium, a new language for writing compiler optimizations that can be automatically proved sound. Unlike our previous work on Cobalt, Rhodium expresses optimizations u...
Sorin Lerner, Todd D. Millstein, Erika Rice, Craig...
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ISPD
2010
ACM
205views Hardware» more  ISPD 2010»
16 years 1 months ago
Total sensitivity based dfm optimization of standard library cells
Standard cells are fundamental circuit building blocks designed at very early design stages. Nanometer standard cells are prone to lithography proximity and process variations. Ho...
Yongchan Ban, Savithri Sundareswaran, David Z. Pan
DAC
2009
ACM
16 years 1 months ago
O-Router: an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
GLVLSI
2009
IEEE
167views VLSI» more  GLVLSI 2009»
16 years 1 months ago
Dual-threshold pass-transistor logic design
This paper introduces pass-transistor logic design with dualthreshold voltages. A set of single-rail, fully restored, passtransistor gates are presented. Logic transistors are imp...
Lara D. Oliver, Krishnendu Chakrabarty, Hisham Z. ...