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» Digital System Design: Architectures, Methods and Tools
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PACS
2000
Springer
83views Hardware» more  PACS 2000»
15 years 10 months ago
A Comparison of Two Architectural Power Models
Reducing power, on both a per cycle basis and as the total energy used over the lifetime of an application, has become more important as small and embedded devices become increasi...
Soraya Ghiasi, Dirk Grunwald
SIAMCO
2010
147views more  SIAMCO 2010»
15 years 5 months ago
Anytime Reliable Transmission of Real-Valued Information through Digital Noisy Channels
Abstract. The problem of reliably transmitting a real-valued random vector through a digital noisy channel is relevant for the design of distributed estimation and control techniqu...
Giacomo Como, Fabio Fagnani, Sandro Zampieri
BMCBI
2007
139views more  BMCBI 2007»
15 years 6 months ago
XSTREAM: A practical algorithm for identification and architecture modeling of tandem repeats in protein sequences
Background: Biological sequence repeats arranged in tandem patterns are widespread in DNA and proteins. While many software tools have been designed to detect DNA tandem repeats (...
Aaron M. Newman, James B. Cooper
IWSOC
2003
IEEE
99views Hardware» more  IWSOC 2003»
15 years 12 months ago
Template Generation and Selection Algorithms
The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a template generation method to extra...
Yuanqing Guo, Gerard J. M. Smit, Hajo Broersma, Pa...
FPGA
2004
ACM
147views FPGA» more  FPGA 2004»
15 years 12 months ago
The SFRA: a corner-turn FPGA architecture
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
Nicholas Weaver, John R. Hauser, John Wawrzynek