Although retargetability has been a major design concern for many compilers, retargetability is a vitally important issue for Digital Signal Processors(DSPs) because the architect...
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
SystemCoDesigner is an ESL tool developed at the University of Erlangen-Nuremberg, Germany. SystemCoDesigner offers a fast design space exploration and rapid prototyping of behavi...
Christian Haubelt, Thomas Schlichter, Joachim Kein...
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Web Information Systems (WIS) support the process of retrieving information from sources on the Web and of presenting them as a hypermedia presentation. Most WIS design ogies focu...
Bas Rutten, Peter Barna, Flavius Frasincar, Geert-...