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IVA
2007
Springer
16 years 20 days ago
The CereVoice Characterful Speech Synthesiser SDK
CereProc R Ltd. have recently released a beta version of a commercial unit selection synthesiser featuring XML control of speech style. The system is freely available for academic ...
Matthew P. Aylett, Christopher J. Pidcock
ASPDAC
2005
ACM
146views Hardware» more  ASPDAC 2005»
15 years 8 months ago
High-level synthesis for DSP applications using heterogeneous functional units
Abstract— This paper addresses high level synthesis for realtime digital signal processing (DSP) architectures using heterogeneous functional units (FUs). For such special purpos...
Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edw...
DAC
2005
ACM
16 years 7 months ago
Automatic generation of customized discrete fourier transform IPs
This paper presents a parameterized soft core generator for the discrete Fourier transform (DFT). Reusable IPs of digital signal processing (DSP) kernels are important time-saving...
Grace Nordin, Peter A. Milder, James C. Hoe, Marku...
VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
16 years 7 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
RSP
2008
IEEE
118views Control Systems» more  RSP 2008»
16 years 28 days ago
Functional DIF for Rapid Prototyping
Dataflow formalisms have provided designers of digital signal processing systems with optimizations and guarantees to arrive at quality prototypes quickly. As system complexity in...
William Plishker, Nimish Sane, Mary Kiemb, Kapil A...