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HOST
2008
IEEE
16 years 1 months ago
Place-and-Route Impact on the Security of DPL Designs in FPGAs
—Straightforward implementations of cryptographic algorithms are known to be vulnerable to attacks aimed not at the mathematical structure of the cipher but rather at the weak po...
Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Dange...
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
16 years 29 days ago
Integrated placement and skew optimization for rotary clocking
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....
DAGSTUHL
2001
15 years 8 months ago
Decision-Theoretic Control of Planetary Rovers
Planetary rovers are small unmanned vehicles equipped with cameras and a variety of sensors used for scientific experiments. They must operate under tight constraints over such res...
Shlomo Zilberstein, Richard Washington, Daniel S. ...
BMCBI
2007
147views more  BMCBI 2007»
15 years 6 months ago
Modeling biochemical transformation processes and information processing with Narrator
Background: Software tools that model and simulate the dynamics of biological processes and systems are becoming increasingly important. Some of these tools offer sophisticated gr...
Johannes J. Mandel, Hendrik Fuß, Niall M. Pa...
ET
2002
122views more  ET 2002»
15 years 6 months ago
Using At-Speed BIST to Test LVDS Serializer/Deserializer Function
LVDS is the acronym for Low-Voltage-DifferentialSignaling and is described in both the ANSI/TIA/EIA644 and IEEE 1596.3 standards. High performance yet Low Power and EMI have made ...
Magnus Eckersand, Fredrik Franzon, Ken Filliter