Sciweavers

8771 search results - page 402 / 1755
» Different by design
Sort
View
IISWC
2008
IEEE
16 years 1 months ago
A workload for evaluating deep packet inspection architectures
—High-speed content inspection of network traffic is an important new application area for programmable networking systems, and has recently led to several proposals for high-per...
Michela Becchi, Mark A. Franklin, Patrick Crowley
DAC
2006
ACM
16 years 8 months ago
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil...
ICSE
2003
IEEE-ACM
16 years 7 months ago
Towards a Systems Engineering Pattern Language: Applying i* to Model Requirements-Architecture Patterns
This paper reports the results of exploratory research to develop a pilot pattern language for systems engineers at BAE SYSTEMS. The pattern language was designed to encapsulate k...
Pete Pavan, Neil A. M. Maiden, Xiaohong Zhu
VL
2008
IEEE
138views Visual Languages» more  VL 2008»
16 years 1 months ago
A case study of API redesign for improved usability
As software grows more complex, software developers’ productivity is increasingly defined by their ability to effectively reuse code. Even APIs (application programming interfac...
Jeffrey Stylos, Benjamin Graf, Daniela K. Busse, C...
AINA
2009
IEEE
16 years 4 days ago
Effects of On-path Buffering on TCP Fairness
Keeping router buffering low helps minimise delay (as well as keeping router costs low), whilst increasing buffering minimises loss. This is a trade-off for which there is no sing...
Saleem N. Bhatti, Martin Bateman