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DATE
1998
IEEE
153views Hardware» more  DATE 1998»
15 years 11 months ago
An Energy-Conscious Exploration Methodology for Reconfigurable DSPs
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
Jan M. Rabaey, Marlene Wan
DAC
2000
ACM
15 years 11 months ago
Block placement with symmetry constraints based on the O-tree non-slicing representation
The ordered tree (O-tree) representation has recently gained much interest in layout design automation. Different from previous topological representations of non-slicing floorpl...
Yingxin Pang, Florin Balasa, Koen Lampaert, Chung-...
ITC
1998
IEEE
61views Hardware» more  ITC 1998»
15 years 11 months ago
Test session oriented built-in self-testable data path synthesis
Existing high-level BIST synthesis methods focus on one objective, minimizing either area overhead or test time. Hence, those methods do not render exploration of large design spa...
Han Bin Kim, Takeshi Takahashi, Dong Sam Ha
ARC
2008
Springer
104views Hardware» more  ARC 2008»
15 years 9 months ago
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
Frank Hannig, Holger Ruckdeschel, Hritam Dutta, J&...
ICMLA
2010
15 years 4 months ago
Classification Models with Global Constraints for Ordinal Data
Ordinal classification is a form of multi-class classification where there is an inherent ordering between the classes, but not a meaningful numeric difference between them. Althou...
Jaime S. Cardoso, Ricardo Sousa