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EMISA
2004
Springer
16 years 6 days ago
A Comparison of XML Interchange Formats for Business Process Modelling
: This paper addresses heterogeneity of business process metamodels and related interchange formats. The different approaches towards interchange format design and effects of inter...
Jan Mendling, Gustaf Neumann, Markus Nüttgens
ICCAD
1997
IEEE
96views Hardware» more  ICCAD 1997»
15 years 11 months ago
Resource sharing in hierarchical synthesis
This paper presents a new approach to hierarchical high-level synthesis with respect to internal register-transfer structures of complex components. Entire subdesigns can efficie...
Oliver Bringmann, Wolfgang Rosenstiel
ASPDAC
2009
ACM
249views Hardware» more  ASPDAC 2009»
15 years 11 months ago
Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus models from a formal model
— This paper proposes the first automatic approach to simultaneously generate Cycle Accurate and Cycle Count Accurate transaction level bus models. Since TLM (Transaction Level M...
Chen Kang Lo, Ren-Song Tsay
FDL
2006
IEEE
15 years 10 months ago
System Description Aspects as Syntactic Sugar
Many different system description and specification languages are used in modern design flows to emphasize different aspects like modular architecture, multibehavior, abstract act...
Jens Brandt, Klaus Schneider
FCCM
2004
IEEE
121views VLSI» more  FCCM 2004»
15 years 10 months ago
Validation of an Advanced Encryption Standard (AES) IP Core
This paper describes the package of test bench code required to verify the Algotronix' AES IP Core. Several authors (see the references in [3]) have published papers detailing...
Valeri F. Tomashau, Tom Kean