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ICCD
1995
IEEE
119views Hardware» more  ICCD 1995»
15 years 10 months ago
Extraction of finite state machines from transistor netlists by symbolic simulation
– This paper describes a new technique for extracting clock-level finite state machines(FSMs) from transistor netlists using symbolic simulation. The transistor netlist is prepr...
Manish Pandey, Alok Jain, Randal E. Bryant, Derek ...
DAC
1994
ACM
15 years 10 months ago
Probabilistic Analysis of Large Finite State Machines
Regarding nite state machines as Markov chains facilitates the application of probabilistic methods to very large logic synthesis and formal veri cation problems. Recently, we ha...
Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fab...
CAV
2008
Springer
125views Hardware» more  CAV 2008»
15 years 8 months ago
Application of Formal Word-Level Analysis to Constrained Random Simulation
Abstract. Constrained random simulation is supported by constraint solvers integrated within simulators. These constraint solvers need to be fast and memory efficient to maintain s...
Hyondeuk Kim, HoonSang Jin, Kavita Ravi, Petr Spac...
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
15 years 8 months ago
BDD-based two variable sharing extraction
It has been shown that Binary Decision Diagram (BDD) based logic synthesis enjoys faster runtime than the classic logic synthesis systems based on Sum of Product (SOP) form. Howev...
Dennis Wu, Jianwen Zhu
DAWAK
2008
Springer
15 years 8 months ago
UML-Based Modeling for What-If Analysis
In order to be able to evaluate beforehand the impact of a strategical or tactical move, decision makers need reliable previsional systems. What-if analysis satisfies this need by ...
Matteo Golfarelli, Stefano Rizzi