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» Deviation Analysis: A New Use of Model Checking
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ICC
2009
IEEE
118views Communications» more  ICC 2009»
16 years 1 months ago
A First Order Logic Security Verification Model for SIP
: It is well known that no security mechanism can provide full protection against a potential attack. There is always a possibility that a security incident may happen, mainly as a...
Dimitris Geneiatakis, Costas Lambrinoudakis, Georg...
ICFEM
2005
Springer
16 years 4 days ago
An Evidential Tool Bus
Abstract. Theorem provers, model checkers, static analyzers, test generators. . . all of these and many other kinds of formal methods tools can contribute to the analysis and devel...
John M. Rushby
KI
2008
Springer
15 years 6 months ago
Shallow Models for Non-iterative Modal Logics
Abstract. Modal logics see a wide variety of applications in artificial intelligence, e.g. in reasoning about knowledge, belief, uncertainty, agency, defaults, and relevance. From ...
Lutz Schröder, Dirk Pattinson
VTC
2007
IEEE
106views Communications» more  VTC 2007»
16 years 27 days ago
Analysis and Design of Dirty Paper Coding by Transformation of Noise
— We design a coding scheme for Costa’s dirty paper coding (DPC) [6] using a channel and a shaping code. We show that by transforming the channel noise distribution the DPC cha...
Young-Seung Lee, Sae-Young Chung
ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
15 years 10 months ago
Power analysis and low-power scheduling techniques for embedded DSP software
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
Mike Tien-Chien Lee, Vivek Tiwari, Sharad Malik, M...