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DFT
2006
IEEE
130views VLSI» more  DFT 2006»
16 years 24 days ago
Off-Chip Control Flow Checking of On-Chip Processor-Cache Instruction Stream
Control flow checking (CFC) is a well known concurrent checking technique for ensuring that a program’s instruction execution sequence follows permissible paths. Almost all CFC...
Federico Rota, Shantanu Dutt, Sahithi Krishna
GLVLSI
2006
IEEE
143views VLSI» more  GLVLSI 2006»
16 years 24 days ago
SACI: statistical static timing analysis of coupled interconnects
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, A...
IPPS
2006
IEEE
16 years 23 days ago
Memory minimization for tensor contractions using integer linear programming
This paper presents a technique for memory optimization for a class of computations that arises in the field of correlated electronic structure methods such as coupled cluster and...
A. Allam, J. Ramanujam, Gerald Baumgartner, P. Sad...
MICRO
2006
IEEE
100views Hardware» more  MICRO 2006»
16 years 22 days ago
Serialization-Aware Mini-Graphs: Performance with Fewer Resources
Instruction aggregation—the grouping of multiple operations into a single processing unit—is a technique that has recently been used to amplify the bandwidth and capacity of c...
Anne Bracy, Amir Roth
APGV
2006
ACM
103views Visualization» more  APGV 2006»
16 years 21 days ago
Perception of image motion during head movement
Previous studies have shown that self-motion has an inhibiting effect on concurrent 3D motion perception. To investigate whether self-motion similarly impairs concurrent image mot...
Li Li, Bernard D. Adelstein, Stephen R. Ellis
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