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ITC
1994
IEEE
136views Hardware» more  ITC 1994»
15 years 9 months ago
An Automatic Test Pattern Generator for Large Sequential Circuits Based on Genetic Algorithms
Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza ...
203
Voted
EVOW
1999
Springer
15 years 10 months ago
Test Pattern Generation Under Low Power Constraints
A technique is proposed to reduce the peak power consumption of sequential circuits during test pattern application. High-speed computation intensive VLSI systems, as telecommunica...
Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Re...
166
Voted
DATE
1999
IEEE
111views Hardware» more  DATE 1999»
15 years 10 months ago
Sequential Circuit Test Generation Using Decision Diagram Models
A novel approach to testing sequential circuits that uses multi-level decision diagram representations is introduced. The proposed algorithm consists of a combination of scanning ...
Jaan Raik, Raimund Ubar
DAC
1994
ACM
15 years 10 months ago
Functional Test Generation for FSMs by Fault Extraction
Recent results indicate that functional test pattern generation (TPG) techniques may provide better defect coverages than do traditional logic-level techniques. Functional TPG alg...
Bapiraju Vinnakota, Jason Andrews
173
Voted
VLSID
1997
IEEE
135views VLSI» more  VLSID 1997»
15 years 10 months ago
Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation
The problem of test generation belongs to the class of NP-complete problems and it is becoming more and more di cult as the complexity of VLSI circuits increases, and as long as e...
Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxen...