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CODES
2003
IEEE
16 years 18 hour ago
Design optimization of mixed time/event-triggered distributed embedded systems
Distributed embedded systems implemented with mixed, eventtriggered and time-triggered task sets, which communicate over bus protocols consisting of both static and dynamic phases...
Traian Pop, Petru Eles, Zebo Peng
FPGA
2003
ACM
117views FPGA» more  FPGA 2003»
15 years 12 months ago
Reducing pin and area overhead in fault-tolerant FPGA-based designs
This paper proposes a new high-level technique for designing fault tolerant systems in SRAM-based FPGAs, without modifications in the FPGA architecture. Traditionally, TMR has bee...
Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz...
DATE
2010
IEEE
158views Hardware» more  DATE 2010»
15 years 11 months ago
Energy- and endurance-aware design of phase change memory caches
—Phase change memory (PCM) is one of the most promising technology among emerging non-volatile random access memory technologies. Implementing a cache memory using PCM provides m...
Yongsoo Joo, Dimin Niu, Xiangyu Dong, Guangyu Sun,...
168
Voted
AUTOMOTIVEUI
2009
ACM
15 years 11 months ago
Glancing at personal navigation devices can affect driving: experimental results and design implications
Nowadays, personal navigation devices (PNDs) that provide GPSbased directions are widespread in vehicles. These devices typically display the real-time location of the vehicle on ...
Andrew L. Kun, Tim Paek, Zeljko Medenica, Nemanja ...
ICN
2001
Springer
15 years 11 months ago
Backbone Network Design with QoS Requirements
In this paper, we consider the backbone network design problem with a full set of QoS requirements. Unlike previous researches, we consider both the transmission line cost and the ...
Hong-Hsu Yen, Frank Yeong-Sung Lin