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VLSID
1999
IEEE
93views VLSI» more  VLSID 1999»
15 years 11 months ago
Spec-Based Repeater Insertion and Wire Sizing for On-chip Interconnect
Recently Lillis, et al. presented an elegant dynamic programming approach to RC interconnect delay optimization through driver sizing, repeater insertion, and, wire sizing which e...
Noel Menezes, Chung-Ping Chen
VTS
1999
IEEE
66views Hardware» more  VTS 1999»
15 years 11 months ago
A New Bare Die Test Methodology
1 While multichip module technology has been developed for high performance IC applications, the technology is not widely adopted due to economical reasons. One of the reasons that...
Zao Yang, K.-T. Cheng, K. L. Tai
169
Voted
HIPS
1998
IEEE
15 years 11 months ago
ZPL's WYSIWYG Performance Model
ZPL is a parallel array language designed for high performance scientific and engineering computations. Unlike other parallel languages, ZPL is founded on a machine he CTA) that a...
Bradford L. Chamberlain, Sung-Eun Choi, E. Christo...
OOPSLA
1999
Springer
15 years 11 months ago
Atlas: A Case Study in Building a Web-Based Learning Environment using Aspect-oriented Programming
The Advanced Teaching and Learning Academic Server (Atlas) is a software system that supports web-based learning. Students can register for courses, and can navigate through perso...
Mik Kersten, Gail C. Murphy
ICRA
1998
IEEE
100views Robotics» more  ICRA 1998»
15 years 11 months ago
Speed, Efficiency and Stability of Small-Slope 2-D Passive Dynamic Bipedal Walking
This paper addresses some performance limits of the kneed and non-kneed passive-dynamic walking machines discovered by McGeer [10, 11]. Energetic inefficiency is measured by the s...
Mariano Garcia, Anindya Chatterjee, Andy Ruina
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