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RTSS
2009
IEEE
16 years 1 months ago
Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores
—Memory accesses form an important source of timing unpredictability. Timing analysis of real-time embedded software thus requires bounding the time for memory accesses. Multipro...
Yan Li, Vivy Suhendra, Yun Liang, Tulika Mitra, Ab...
ISCA
2008
IEEE
137views Hardware» more  ISCA 2008»
16 years 1 months ago
Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
Engin Ipek, Onur Mutlu, José F. Martí...
EMSOFT
2006
Springer
15 years 10 months ago
Multi-level software reconfiguration for sensor networks
In-situ reconfiguration of software is indispensable in embedded networked sensing systems. It is required for re-tasking a deployed network, fixing bugs, introducing new features...
Rahul Balani, Chih-Chieh Han, Ram Kumar Rengaswamy...
ICML
2006
IEEE
16 years 7 months ago
Maximum margin planning
Mobile robots often rely upon systems that render sensor data and perceptual features into costs that can be used in a planner. The behavior that a designer wishes the planner to ...
Nathan D. Ratliff, J. Andrew Bagnell, Martin Zinke...
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COOPIS
2002
IEEE
15 years 11 months ago
Composing and Deploying Grid Middleware Web Services Using Model Driven Architecture
Rapid advances in networking, hardware, and middleware technologies are facilitating the development and deployment of complex grid applications, such as large-scale distributed co...
Aniruddha S. Gokhale, Balachandran Natarajan