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QEST
2010
IEEE
15 years 4 months ago
Automatic Compositional Reasoning for Probabilistic Model Checking of Hardware Designs
Adaptive techniques like voltage and frequency scaling, process variations and the randomness of input data contribute signi cantly to the statistical aspect of contemporary hardwa...
Jayanand Asok Kumar, Shobha Vasudevan
TASE
2011
IEEE
15 years 1 months ago
KnitSketch: A Sketch Pad for Conceptual Design of 2D Garment Patterns
—In this paper, we present a new sketch-based system — KnitSketch, to improve the efficiency of process planning for knitting garments at an early design stage. The KnitSketch...
Cui-Xia Ma, Yong-Jin Liu, Hai-Yan Yang, Dong-Xing ...
GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
14 years 10 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
ISCA
2011
IEEE
313views Hardware» more  ISCA 2011»
14 years 10 months ago
FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay ...
DAC
2007
ACM
16 years 7 months ago
Automatic Verification of External Interrupt Behaviors for Microprocessor Design
Interrupt behaviors, especially the external ones, are difficult to verify in a microprocessor design project in that they involve both interacting hardware and software. This pap...
Fu-Ching Yang, Wen-Kai Huang, Ing-Jer Huang