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ICCD
2004
IEEE
107views Hardware» more  ICCD 2004»
16 years 3 months ago
Network-on-Chip: The Intelligence is in The Wire
In this paper we describe how Network-on-Chip (NoC) will be the next major challenge to implementing complex and function-rich applications in advanced manufacturing processes at ...
Gérard Mas, Philippe Martin
TEI
2009
ACM
151views Hardware» more  TEI 2009»
16 years 1 months ago
Architales: physical/digital co-design of an interactive story table
Many research efforts today explore how digitally augmented tables enable face-to-face interaction with digital content and applications. Yet the design of digital tables is still...
Ali Mazalek, Claudia Winegarden, Tristan Al-Haddad...
CP
2009
Springer
16 years 1 months ago
Pin Assignment Using Stochastic Local Search Constraint Programming
Abstract. VLSI chips design is becoming increasingly complex and calling for more and more automation. Many chip design problems can be formulated naturally as constraint problems ...
Bella Dubrov, Haggai Eran, Ari Freund, Edward F. M...
ACSD
2005
IEEE
144views Hardware» more  ACSD 2005»
16 years 11 days ago
An Automated Fine-Grain Pipelining Using Domino Style Asynchronous Library
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
Alexander B. Smirnov, Alexander Taubin, Ming Su, M...
ISLPED
2005
ACM
147views Hardware» more  ISLPED 2005»
16 years 9 days ago
System level power and performance modeling of GALS point-to-point communication interfaces
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...
Koushik Niyogi, Diana Marculescu